Omkar Rajendra Palaskar

Omkar Rajendra Palaskar

Summary: - Graduate student at San Jose State University with specialization in Digital VLSI. - Experience working in Hardware Design for FPGA,... | Austin, Texas, United States

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Work Experience

Nxp Semiconductors

Senior Design Verification Engineer

Tue Feb 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time) — Present

Analog Devices

Digital Design Engineer

Thu Aug 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Feb 01 2022 00:00:00 GMT+0000 (Coordinated Universal Time)

Lewiz Communications

Hardware Design Intern

Wed Aug 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed May 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)

Granite River Labs

Hardware Test Intern

Fri Jun 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Aug 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)

San Jose State University

Instructional Student Assistant

Thu Feb 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue May 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)

Accenture

Software Engineer

Fri Aug 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Jun 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)

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